7nm Physical Design Contest
Breaking Barriers with Open-Source VLSI
OpenROAD delivers open-source and barrier-free VLSI Solutions for RTL-GDSII flow implementation for hardware and software design engineers, enthusiasts and researchers.
This contest, organized by The OpenROAD Project and VSD, features interesting design challenges at an advanced technology node (7nm).
Unleash your creativity and skills in the physical design implementation on popular RISC-V based cores using an OpenROAD flow and a VSD-powered cloud.
The contest will feature interesting design challenges with unique opportunities for recognition, contribution, cash prizes and certificates.
You will be able to connect and network with other professionals, the open-source design user community, showcase your skills, and contribute to the semiconductor community at large.
The contest is aimed at significantly improving area, performance and Runtime for an opensource RISC-V Core using OpenROAD-Flow-Scripts on an advanced technology node 7nm using ASAP7 PDK.
Using any of the following RISC-V cores from the OpenROAD-flow-scripts repository: RISCV32i, ibex, swerv_wrapper demonstrate the best achievable performance for the design for a given die size on ASAP7. The design must be DRC and LVS clean.
Best performance score function:
Best fmax with 0 wns
Best Possible Runtime
Using any of the following RISC-V cores from the OpenROAD flow-scripts repository: RISC-V32i, ibex, swerv_wrapper demonstrate the fastest Runtime from RTL-GDSII with good area and performance. Use cloud resources, suitable design configurations, tool changes (any or all of these) to meet this target. The design must be DRC and LVS clean.
Best Runtime Score Function:
For the given machine setup, minimize runtime for best area and performance.
Outstanding Contribution Award
Best contribution score function:
Impact of the contribution in terms of innovation, runtime or QoR improvement.
Who Can Participate?
The contest is open to individuals of all skill levels, including students, professionals, and enthusiasts, who have an interest in
VLSI Physical Design.
Registration is FREE of cost. The participant should have a good understanding of basic digital electronics to be able to complete the given
VLSI Design Challenges.
Learn how OpenROAD democratizes IC design and makes VLSI design low cost, barrier-free and easy-to-use as an exciting paradigm in ASIC design flows.
Gain Practical Experience using OpenROAD flow and tools on the cloud through hands-on participation at an advanced technology node at 7nm.
Gain recognition and visibility in mainstream VLSI Design by showcasing your skills and contributions. Final designs and methodologies will be published on the OpenROAD Github for public access to other designers and learners.
Grab the chance to win cash rewards up to $2000. Winners will be announced on the OpenROAD website and related media links.